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LTR C
Convert to standardized military drawing format. Added device type 02. Technical changes in 1.3, 1.4, table I and Table II. Delete CAGE 31019. Add CAGE 18714. No approved sources for device type 01. Add figure 3. Editorial changes throughout. Add device 03. Update boilerplate.
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Update boilerplate to MIL-PRF-38535 requirements. - jak
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REVISIONS DATE (YR-MO-DA) 89-07-26 APPROVED M. A. Frye
DESCRIPTION
94-03-08 01-03-20 05-03-14
Monica L. Poelking Thomas M. Hess Thomas M. Hess
Made change to paragraph 3.5. Update boilerplate to MIL-PRF-38535 requirements. - LTG
Device type 01AX is inactive for new design as of 1 Oct. 1986
FIRST PAGE OF THIS DRAWING HAS BEEN CHANGED.
CURRENT CAGE CODE 67268
REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A
REV
STANDARD MICROCIRCUIT DRAWING
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SHEET
PREPARED BY A. J. Foley CHECKED BY C. R. Jackson
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DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil
THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A
APPROVED BY Nelson A. Hauck
DRAWING APPROVAL DATE 77-09-26 REVISION LEVEL F
DSCC FORM 2233 APR 97
4U MICROCIRCUIT, DIGITAL, CMOS, NOR t GATES, MONOLITHIC SILICON e he aS at 77044 .D w w w
SIZE A CAGE CODE
om .c
14933
SHEET
1 OF
12
5962-E202-05
1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 77044 01 C A
Drawing number
Device type (see 1.2.1)
Case outline (see 1.2.2)
Lead finish (see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 03 Generic number 4078B 4078B 4002B Circuit function 8-input NOR gate 8-input NOR/OR gate 4-input NOR gate
1.2.2 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter A C Descriptive designator GDFP5-F14 or CDFP6-F14 GDIP1-T14 or CDIP2-T14 Terminals 14 14 Package style Flat pack Dual-in-line
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VDD) device type 01 .......................................................... -0.5 V dc to +18.0 V dc 1/ Supply voltage range (VDD) device type 02 and 03 .............................................. -0.5 V dc to +20.0 V dc 1/ Input voltage range .............................................................................................. -0.5 V dc to VDD + 0.5 V dc DC input current (any one input) .......................................................................... 10 mA Storage temperature range (TSTG) ....................................................................... -65C to +150C Maximum power dissipation (PD) ......................................................................... 500 mW 2/ Lead temperature (soldering, 10 seconds)........................................................... +300C Thermal resistance, junction-to-case (JC) ........................................................... See MIL-STD-1835 Junction temperature (TJ) ................................................................................... +175C 1.4 Recommended operating conditions. 1/ Supply voltage range (VDD) .................................................................................. +3.0 V dc to +18.0 V dc Minimum low level input voltage (VIH) .................................................................. 3.5 V dc at VDD = 5.0 V dc Maximum low level input voltage (VIL):................................................................. 1.5 V dc at VDD = 5.0 V dc Case operating temperature range (TC) ................................................................ -55C to +125C
1/ 2/
Voltages referenced to the VSS terminal. For TA = +100C to +125C, derate linearly at 12 mW/C to 200 mW.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
2
2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 List of Standard Microcircuit Drawings. Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
3
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
4
TABLE I. Electrical performance characteristics. Test Symbol Test conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit
Min Quiescent current IDD 1/ VDD = 10.0 V VIN = 0.0 V or VDD VDD = 5.0 V VIN = 0.0 V or VDD 01 02, 03 01 02, 03 01 02, 03 02, 03 All All All All All All All All All All All All 1, 2, 3 1, 3 2 1, 2, 3 1, 3 2 VDD = 15.0 V VIN = 0.0 V or VDD 1, 2, 3 1, 3 2 VDD = 20.0 V 2/ VIN = 0.0 V or VDD Low level output voltage VOL VDD = 5.0 V 1/ VIN = 0.0 V or VDD, | IO | < 1.0 A VDD = 10.0 V 1/ VIN = 0.0 V or VDD, | IO | < 1.0 A VDD = 15.0 V VIN = 0.0 V or VDD, | IO | < 1.0 A VDD = 5.0 V 1/ VIN = VDD or 0.0 V, | IO | < 1.0 A VDD = 10.0 V 1/ VIN = VDD or 0.0 V, | IO | < 1.0 A VDD = 15.0 V VIN = VDD or 0.0 V, | IO | < 1.0 A VDD = 5.0 V VOUT = 0.5 V or 4.5 V VDD = 10.0 V 1/ VOUT = 1.0 V or 9.0 V VDD = 15.0 V VOUT = 1.5 V or 13.5 V VDD = 5.0 V VOUT = 0.5 V or 4.5 V VDD = 10.0 V 1/ VOUT = 1.0 V or 9.0 V VDD = 15.0 V VOUT = 1.5 V or 13.5 V 1, 3 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 3.5 7.0 11.0 4.95 9.95 14.95
Max 10.0 0.25 7.5 20.0 0.5 15.0 40.0 1.0 30.0 5.0 150.0 0.05 0.05 0.05
A
V
High-level output voltage
VOH
V
Low level input voltage
VIL
1.5 3.0 4.0
V
High-level input voltage
VIH
V
See footnotes at end of table.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
5
TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified VDD = 5.0 V, VOUT = 4.6 V VDD = 10.0 V, VOUT = 9.5 V VDD = 15.0 V, VOUT = 13.5 V VDD = 5.0 V, VOUT = 0.4 V VDD = 10.0 V, VOUT = 0.5 V VDD = 15.0 V, VOUT = 1.5 V VDD = 5.0 V VOUT = 0.4 V VIN = 0.0 V or VDD VDD = 10.0 V VOUT = 0.5 V VIN = 0.0 V or VDD VDD = 15.0 V VOUT = 1.5 V VIN = 0.0 V or VDD High-level output current (source) IOH 3/ VDD = 5.0 V VOUT = 4.6 V VIN = 0.0 V or VDD VDD = 5.0 V VOUT = 2.5 V VIN = 0.0 V or VDD VDD = 10.0 V VOUT = 9.5 V VIN = 0.0 V or VDD VDD = 15.0 V VOUT = 13.5 V VIN = 0.0 V or VDD Input current IIN CIN VDD = 18.0 V VIN = 0.0 V or VDD VIN = 0.0 V TC = +25C See 4.3.1b See 4.3.1c Device type Group A subgroups Limits Unit
Output drive current (source) P channel Output drive current (sink) N channel Low-level output current (sink)
IDP
01
1, 2, 3
IDN
01
1, 2, 3
IOL 3/
02, 03
1 2
Min -0.3 -0.65 -2.2 0.3 0.65 2.2 0.51 0.36 0.64 1.3 0.9 1.6 3.4 2.4 4.2 -0.51 -0.36 -0.64 -1.6 -1.15 -2.0 -1.3 -0.9 -1.6 -3.4 -2.4 -4.2
Max mA
mA
mA
02, 03
3 1 2
02, 03
3 1 2
02, 03
3 1 2
mA
02, 03
3 1 2
02, 03
3 1 2
02, 03
3 1 2
All
3 1, 3 2
0.1 1.0 7.5
A pF
Input capacitance
All
4
Functional tests See footnotes at end of table.
All
7, 8
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
6
TABLE I. Electrical performance characteristics - Continued. Test Symbol Test conditions -55C TC +125C unless otherwise specified CL = 50 pF RL = 200 k See figure 4 VDD = 5.0 V Device type Group A subgroups Limits Unit
Min Propagation delay time, data to output tPHL, tPLH 01 02 03 VDD = 10.0 V 1/ 01 02 03 VDD = 15.0 V 1/ 01 02 03 Transition time tTHL, tTLH CL = 50 pF RL = 200 k See figure 4 VDD = 5.0 V VDD = 10.0 V 1/ VDD = 15.0 V 1/ All 9, 10, 11 9 10, 11 9 10, 11 9, 10, 11 9 10, 11 9 10, 11 9, 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11
Max 1275.0 300.0 390.0 250.0 375.0 510.0 150.0 195.0 120.0 180.0 360.0 110.0 143.0 90.0 135.0 200.0 300.0 100.0 150.0 80.0 120.0
ns
ns
1/ 2/ 3/
This condition is guaranteed, if not tested, to the specified limits in table I. At -55C this test is performed with VDD = 18 V. The IOL and IOH tests are tested 100% at +25C, and guaranteed, if not tested, at +125C and -55C.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
7
Device type Case outlines Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NC = No connection
01 A and C
02 C
03 C
Terminal symbol NC A B C D NC VSS NC E F G H Y VDD J A B C D NC VSS NC E F G H K VDD J A B C D NC VSS NC E F G H K VDD
FIGURE 1. Terminal connections. Device type 01 Inputs A L B L C D E F G L L L L L All other combinations Device type 02 Inputs A L B L C D E F G L L L L L All other combinations Device type 03 Inputs A L B L C L D L L L L L L E F G H Outputs J H H L K H L H L
Outputs Y H L
Outputs K L H J H L
All other combinations H = High voltage level L = Low voltage level FIGURE 2. Truth table.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
8
FIGURE 3. Logic diagram.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
9
NOTES: 1. RL = 200 k 2. CL = 50 pF (includes probe and test jig capacitance) 3. Input pulse: VGEN = VDD 1.0% tw = 1.0 0.1 s tr = tf =20 2.0 ns PRR = 200 kHz 4. All unused inputs must be tied to VSS.
FIGURE 4. Switching waveforms and test circuit.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
10
4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. b. Tests shall be as specified in table II herein. Subgroup 4 (CIN measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. Capacitance shall be measured between the designated terminal and VSS at a frequency of 1 MHz. Test all applicable pins on 5 devices with zero failures. Subgroups 7 and 8 shall include verification of the truth table as specified on figure 2.
c.
4.3.2 Groups C and D inspections. a. b. End-point electrical parameters shall be as specified in table II herein. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, and D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. TA = +125C, minimum. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
(2) (3)
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
11
TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) --1, 2, 3, 7, 9 1/ 1, 2, 3, 4, 7, 8, 9, 10, 11 2/ 1, 2, 3
Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005)
1/ PDA applies to subgroup 1. 2/ Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I.
5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990 or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA.
STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990
DSCC FORM 2234 APR 97
SIZE
A
REVISION LEVEL F
77044 SHEET
12
STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 05-03-14 Approved sources of supply for SMD 77044 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/SMCR/.
Standard microcircuit drawing PIN 1/ 7704401AA 3/ 7704401CA 7704402CA 7704403CA
Vendor CAGE number 4/ 4/ 01295 01295
Vendor similar PIN 2/ CD4078BK/3 883C4078BC CD4078BF3A CD4002BF3A
1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the Vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Inactive for new design. 4/ No longer available from an approved source of supply. Vendor CAGE number 01295 Vendor name and address Texas Instruments Inc. Semiconductor Group 8505 Forest Ln. P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493
The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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